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In an SR latch made up of a pair of cross-connected NAND gates, which of the following inputs at the S…

The prohibited input combination is 0–0. In a cross-connected NAND latch it forces both outputs to 1, violating their complementary relationship; releasing both inputs…

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In an SR latch made up of a pair of cross-connected NAND gates, which of the following inputs at the S and R terminals is prohibited (avoided) ?

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Correct answer A

The prohibited input combination is 0–0. In a cross-connected NAND latch it forces both outputs to 1, violating their complementary relationship; releasing both inputs together can leave the final state indeterminate. The 1–1 input holds the stored state.

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  • Gujarat SET (GSET)

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